SNDT WOMEN'S UNIVERSITY
BMK Knowledge Resource Centre
Vithaldas Vidyavihar, Juhu Tara Road,
Santacruz (West) Mumbai - 400049
Real Time Delay Application for Digital Circuits with Peripheral based Digital Clock using FPGA (Record no. 129656)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00572nam a2200169 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 240924b |||||||| |||| 00| 0 eng d |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | B.Murali Krishna |
| 245 ## - TITLE STATEMENT | |
| Title | Real Time Delay Application for Digital Circuits with Peripheral based Digital Clock using FPGA |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 69-78 |
| 654 ## - SUBJECT ADDED ENTRY--FACETED TOPICAL TERMS | |
| Subject | <a href="FPGA">FPGA</a> |
| -- | <a href="VGA">VGA</a> |
| -- | <a href="LCD">LCD</a> |
| -- | <a href="SSD">SSD</a> |
| -- | <a href="Clock">Clock</a> |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | P.Tejaswi |
| -- | G.L.Madhumati |
| -- | Habibulla khan |
| 773 0# - HOST ITEM ENTRY | |
| Host Biblionumber | 80273 |
| Host Itemnumber | 109586 |
| Place, publisher, and date of publication | New Delhi |
| Title | Indian Journal of Advances in Communication Engineering |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Journal Article |
| 773 0# - HOST ITEM ENTRY | |
| -- | JP29 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| -- | ddc |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Location (home branch) | Sublocation or collection (holding branch) | Date acquired | Koha issues (times borrowed) | Piece designation (barcode) | Koha date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | SNDT Juhu | SNDT Juhu | 24/09/2024 | JP29.7 | 24/09/2024 | 24/09/2024 | Journal Article |